ESD is the transfer of an electrostatic charge between two objects that can occur when two objects of different potentials come into direct contact with each other. In the semiconductor industry, the occurrence of an ESD event can be one of the leading causes for the failure of ICs. ESD protection for ICs is even growing in importance as the demand for higher operating speed, smaller operating voltages, higher packing density and reduced cost drives a reduction of device dimensions. Each of these factors can contribute to an increased sensitivity of ICs to damaging ESD events.
Semiconductor manufacturers may require a product to pass an ESD qualification before being released to customers to determine that ESD protection is provided and that the ESD protection complies with applicable requirements. To determine the existence and compliance of ESD protection, review teams may examine the schematic and layout of each IC. Typically, this examination process is manual and therefore can be tedious and time-consuming.
Simulations of ICs, such as a simulation generated using Simulation Program with Integrated Circuit Emphasis (SPICE), could be used instead of manual examination of the circuits. However, fully-physical ESD models for each specific circuit of an IC would be needed. These ESD models would result in more complex models than standard SPICE models and require very large scale simulation. Improved ESD simulations, therefore, for ICs would be useful in the art.